Skip to content
View donn's full-sized avatar

Organizations

@NixOS @fossi-foundation @AUCOHL

Block or report donn

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
donn/Readme.md

Hi!

I am Mohamed "Donn" Gaber, a computer engineering graduate and graduate student at the American University in Cairo and a member of the FOSSi Foundation. I am currently also a part-time CAD Tool Engineering Contractor with Silimate, Inc.

I am the primary maintainer of LibreLane, which is the successor to the OpenLane 2 project I started and maintained at Efabless Corporation, among other related projects.

Highlights

  • LibreLane — Infrastructure for high-quality, modular and repeatable ASIC flows, that implements a flow that is backwards-compatible with OpenLane. Started at Efabless as OpenLane 2.0.
  • OpenLane — The premier open-source RTL-to-GDSII flow by Efabless Corporation, used for countless designs on the Google OpenMPW and Efabless chipIgnite shuttles, based on Yosys, OpenROAD, Magic, KLayout and other tools.
  • Fault — Somehow the only open-source design-for-test solution, including ATPG, Scan Chain Stitching, and TAP insertion and verification.
  • Difetto – Graduate thesis; a flow built using plugins to both LibreLane and Yosys to create a faster and more robust open-source design-for-test solution.

Side Projects

These get patches in my dwindling spare time and are pretty inactive, but I'm still mostly proud of them.

  • Nudelta — A reverse-engineered open-source alternative to the console for the NuPhy Air75 and Halo75 v1 keyboards
  • Oak — A browser-based assembler/simulator for MIPS and RISC-V
  • Phi — A more focused take on Verilog that was my undergrad thesis project/parser learning playground

Contacts

I do not maintain other active social media presences.

Pinned Loading

  1. nudelta nudelta Public

    Open source NuPhy Console alternative

    JavaScript 591 28

  2. AUCOHL/DFFRAM AUCOHL/DFFRAM Public

    Standard Cell Library based Memory Compiler using FF/Latch cells

    Verilog 163 35

  3. librelane/librelane librelane/librelane Public

    ASIC implementation flow infrastructure, successor to OpenLane

    Python 256 44

  4. difetto difetto Public

    [WIP] Open-source DFT flow

    Python 18